Digital signal processors (DSPs) may be used for a variety of multimedia applications such as digital video, imaging, and audio. DSPs can manipulate the digital signals to create and open such multimedia files.
DSPs may operate as SIMD (Single Instruction/Multiple Data), or data parallel, processors. In SIMD operations, a single instruction is sent to a number of processing elements, which perform the same operation on different data. A central controller may be used to broadcast the instruction stream to the different processing elements. SIMD instructions provide for several types of standard operations including addition, subtraction, multiplication, multiply-accumulate (MAC), and a number of special instructions for L1-Norm-accumulate (SAA), clipping, and bilinear interpolation.
Many video and image processing devices operate on 8 bit words arranged in a two dimensional (2D) data array. Four 8 bit operands may be packed into a 32 bit grouped word to be sent to the execution units for parallel processing. These 8 bit operands from the 2D array must be properly aligned in the 32 bit grouped word for proper operation.
When working with 8 bit data on a 32 bit word aligned machine, four different alignment possibilities may exist: aligned; shifted 8 bits; shifted 16 bits; and shifted 24 bits. If the DSP detects a misaligned word, it may generate an exception. In response to the exception, an alignment operation may be performed at the memory interface or in data registers to shift the 8 bit operands to produced an aligned 32 bit word. However, this alignment operation may introduces additional processing overhead into the operation of the machine.
Alignment overhead for 8 bit SIMD operations may result in inefficient utilization of resources within a general purpose DSP. Often this inefficiency will manifest itself as unnecessary cycle consumption due to alignment operations applied to prepare the data for processing.